Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
2007-07-24
2007-07-24
Peyton, Tammara (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
C710S030000, C710S036000, C710S052000, C709S212000, C709S250000
Reexamination Certificate
active
10899196
ABSTRACT:
A method and system for DMA transfer of data in scatter/gather mode. A table of buffer descriptors may be used to determine the next buffer to be used when a current buffer storing data that has been transferred or will be transferred and may be used in automatic buffer switching, which does not require processor intervention. Entries in the table of buffer descriptors are entered programmatically. The method and system also provide for hardware writing to table of packet descriptors which describes location and size of incoming data and can indicate whether a packet of data straddles two or more buffers, thus decoupling packet sizes from buffer sizes.
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patent: 6647438 (2003-11-01), Connor et al.
patent: 2003/0065735 (2003-04-01), Connor
patent: 2003/0120835 (2003-06-01), Kale et al.
IBM-TDB “Priority Scheme for Arithmetic Logic Unit and Dataflow Usage by P1394 Isochronous Hardware”, p. 477-480, vol. 38, Issue 2, Pub. Date-Feb. 1, 1995.
Longley Mark
Machnicki Erik P.
Simon Moshe B.
Cradle Technologies, Inc.
Peyton Tammara
Schneck Thomas
Schneck & Schneck
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