Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-09-11
1999-07-06
Lall, Parshotam S.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
3958003, 711155, G06F 15167
Patent
active
059207140
ABSTRACT:
In a tightly coupled communication scheme based on a common shared resource circuit having a plurality of shared information registers and adapted particularly to a multiprocessing system having 2.sup.N CPUs, a method of performing a read-and-modify instruction. Data stored in a shared information register is read from the shared register, captured in a read and increment circuit and sent to the processor issuing the read-and-modify instruction. At the same time, a mathematical function is performed on the captured data is incremented and the result is written back into the shared information register.
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Cray Research Inc.
Lall Parshotam S.
Vu Viet
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