Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Patent
1997-08-13
1999-11-02
Lee, Thomas C.
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
710200, 710260, 711170, 711163, G06F 1314
Patent
active
059788607
ABSTRACT:
A system and method for disabling and re-enabling peripheral devices (PDs) in a computer system is disclosed. The system includes a CPU, a host bus coupled to the CPU, a host-bus-to-peripheral-device-bus (HB/PDB) bridge coupled to the host bus, at least one PD, at least one peripheral device bus coupling the HB/PDB bridge and at least one PD, and a device, typically in the form of a digital gate, for selectively disabling and re-enabling at least one PD. The disclosed method operates in connection with a computer system having a CPU, a HB/PDB bridge coupled to the CPU and capable of sending a device-configuration-space-access-signal (DCSAS) to the DCSAS input pin of a target PD when attempting an access operation, such as a read or a write operation, on the target PD, and one or more system I/O registers having a CONFIG ENABLE bit that reflects a user's request to disable or re-enable a PD. The method intercepts the DCSAS before it reaches the DCSAS input pin of the target PD, provides the intercepted DCSAS to the input of a digital gate such as an AND gate, provides a signal corresponding to the CONFIG ENABLE bit to the input of the same digital gate, and delivers the resulting output signal from the digital gate to the DCSAS input pin of the target PD.
REFERENCES:
patent: 5379384 (1995-01-01), Solomon
patent: 5446869 (1995-08-01), Padgett et al.
patent: 5450551 (1995-09-01), Amini et al.
patent: 5471590 (1995-11-01), Melo et al.
patent: 5499346 (1996-03-01), Amini et al.
patent: 5517650 (1996-05-01), Bland et al.
patent: 5522050 (1996-05-01), Amini et al.
patent: 5550989 (1996-08-01), Santos
patent: 5557758 (1996-09-01), Bland et al.
patent: 5692219 (1997-11-01), Chan et al.
patent: 5737765 (1998-04-01), Shigeeda
patent: 5764996 (1998-06-01), Armstrong et al.
Artsdalen James Van
Chan Wai-Ming Richard
Hayes Stuart
Dell USA L.P.
Elamin Abdelmonieml
Lee Thomas C.
Terrile Stephen A.
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