System and method for directional prefetching

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C711S126000

Reexamination Certificate

active

06931494

ABSTRACT:
Systems and methods that provide directional prefetching are provided. In one embodiment, a method may include one or more of the following: storing a first block and a second block in a prefetch buffer; associating a first block access with a backward prefetch scheme; associating a second block access with a forward prefetch scheme; and, if the first block is accessed before the second block, then performing a backward prefetch with respect to the first block.

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Milos Prvulovic et al., “The Split Spatial/Non-Spatial Cache: A Performance and Complexity Evaluation,” IEEE TCCA Newsletters, 1999, pp. 1-8.
John Tse & Jay Smith, “CPU Cache Prefetching: Timing Evaluation of Hardware Implementations,” IEEE Transactions on Computers, vol. 47, No. 5, May 1998, pp. 509-526.
Jim Handy, “The Cache memory Book: the authoritative reference on cache design,” Academic Press, 2ndEdition, 1998.

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