Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-05-16
2006-05-16
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07047507
ABSTRACT:
A method and system for determining wire capacitance for a VLSI circuit design, comprising determining all hierarchical blocks of a portion of the design; storing, for a plurality of the blocks, indicia of the most accurate one of a plurality of wire capacitance data sources; generating a wire capacitance database with an entry for each net in at least a plurality of the blocks, using information stored in at least one of the wire capacitance data sources; generating a hierarchical connectivity model for the design; and using the hierarchical connectivity model and said wire capacitance database to determine a cumulative wire capacitance value for each HLSN in each of the blocks in a portion of the design to be analyzed.
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Keller, S. Brandon; Rogers, Dennis R.; Lelm, Charles A.; U.S. Appl. No. 10/706,682, Entitled: Method And Program Product For. Determining Nets Requiring Detailed Electromigration And Self Heating Analysis In A Digital Integrated Circuit; filed Nov. 12, 2003.
Keller, S. Brandon; Rogers, Dennis R.; Lelm, Charles A.; U.S. Appl. No. 10/706,698, Entitled: Method And Program Product For Performing Self-Heating Analysis In A Digital Integrated Circuit Through A Single Cycle Transient Simulation; filed Nov. 12, 2003.
Keller, S. Brandon; Rogers, Dennis R.; Lelm, Charles A.; U.S. Appl. No. 10/706,376, Entitled: Method And Program For Visual Display and One-Click Repair Of Electromigration And Self Heating Design-Rule Violations In A Digital Integrated Circuit Layout Database; filed Nov. 12, 2003.
Keller, S. Brandon; Rogers, Dennis R.; Lelm, Charles A.; U.S. Appl. No. 10/706,501, Entitled: Method And Program Product For Performing Electromigration Analysis In A Digital Integrated Circuit By Converting A Netlist To A DC Model And Performing DC Analysis Of The DC Model; filed Nov. 12, 2003.
Keller, S. Brandon; Rogers, Dennis R.; Lelm, Charles A.; U.S. Appl. No. 10/706,526, Entitled: Method And Program Product For Performing A Worst Case Electromigration And Self Heating Analysis In A Digital Integrated Circuit With Worst-Case Superposition Of Partial Currents; filed Nov. 12, 2003.
Keller, S. Brandon; Rogers, Dennis R.; Lelm, Charles A.; U.S. Appl. No. 10/706,692, Entitled: Method And Program Product For Performing Electromigration Analysis In A Digital Integrated Circuit Through A Single Cycle Transient Simulation; filed Nov. 12, 2003.
Keller, S. Brandon; Rogers, Dennis R.; Lelm, Charles A.; U.S. Appl. No. 10/706,508, Entitled: Method And Program Product For Performing Self-Heating Analysis In A Digital Integrated Circuit Layout Database by Substituting Resistive Models For Active Devices; filed Nov. 12, 2003.
Keller, S. Brandon; Rogers, Dennis R.; Robberts, George H.; U.S. Patent Application filed under EV210655516US; Entitled: Method And Program Product For Determining Worst Case Currents In A Digital Integrated Circuit Through Worst-Case Superposition Of Partial Currents; filed Jan. 30, 2004.
Keller, S. Brandon; Rogers, Dennis R.; Robberts, George H.; U.S. Patent Application filed under EV210655564US; Entitled: Systems And Methods For Re-Using Circuit Design Analysis Results; filed Jan. 30, 2004.
Keller, S. Brandon; Rogers, Dennis R.; Robberts, George H.; U.S. Patent Application filed under EV210655581US; Entitled: System And Method For Determining Detail Of Analysis In A Circuit Design; filed Jan. 30, 2004.
Keller, S. Brandon; Rogers, Dennis R.; Robberts, George H.; U.S. Patent Application filed under EV210655595US; Entitled: Systems And Methods That Identify Equivalent Instantiation-Specific Configuration Information For Analysis Tools; filed Jan. 30, 2004.
Keller, A. Brandon; Rogers, Dennis R.; Robberts, George H. & Stevens, Scott Alan; U.S. Patent Application filed under EV21065552OUS; Entitled System And Method To Limit Analyzed Current Flow In A Circuit Design; filed Jan. 30, 2004.
Keller, S. Brandon; Rogers, Dennis R.; Robberts, George H.; U.S. Patent Application filed under EV210655533US; Entitled: System And Method For Processing Configuration Information; filed Jan. 30, 2004.
Keller, S. Brandon; Rogers, Dennis R.; Robberts, George H.; U.S. Patent Application filed under EV210655555US; Entitled: System And Method For Balancing Run-Time And Result Accuracy In A Circuit Design Analysis Tool; filed Jan. 30, 2004.
Keller, S. Brandon; Rogers, Dennis R.; Robberts, George H.; U.S. Patent Application filed under EV210655578US; Entitled: System And Method For Indicating Logic State Combinations Used During Circuit Design Analysis; filed Jan. 30, 2004.
Keller, S. Brandon; Rogers, Dennis R.; Robberts, George H.; U.S. Patent Application filed under EV210655547US; Entitled: System And Method For Determining Control Signal Combinations For Use During Simulation Of A Stage Of A Circuit Design; filed Jan. 30, 2004.
Keller S. Brandon
Robbert George Harold
Rogers Gregory Dennis
Dimyan Magid Y.
Whitmore Stacy A.
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