Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
Patent
1997-12-23
2000-02-15
Palys, Joseph E.
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Counting, scheduling, or event timing
714 38, G06F 1100
Patent
active
060264977
ABSTRACT:
A system for facilitating determination of accurate timing of execution of a computer program fragment by a digital computer comprises a clock resolution determination subsystem and an iteration number determination subsystem. The clock resolution determination subsystem determines a clock resolution value representing a resolution of a clock provided by the digital computer. The iteration number determination subsystem uses the clock resolution value, and maximum and minimum desired time interval values, to determine an iteration number value, the iteration number representing a number of iterations for execution of the computer program fragment to provide accurate timing of the computer program fragment by the digital computer.
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Jordan Richard A.
Omar Omar A.
Palys Joseph E.
Sun Microsystems Inc.
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