System and method for determining a carrier layout using...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

10853936

ABSTRACT:
A system and method for determining a carrier layout using cornered chip-to-chip input/output is presented. Each of a plurality of individual integrated circuit carriers communicatively interfaceable through cornered input/output ports is oriented at a uniform rotation relative to an edge of a carrier layout. Each carrier defines a set of rectilinear edges. Each carrier is placed juxtaposed at an open corner to at least one other carrier within a rectilinear lattice topologically arranged in the carrier layout to substantially minimize Hamming distances between each of the carriers.

REFERENCES:
patent: 6374387 (2002-04-01), van den Berghe
patent: 6657130 (2003-12-01), Van Dyke et al.
patent: 7045718 (2006-05-01), Loibl
patent: 2005/0109535 (2005-05-01), Audet et al.
Goeckel et al., “Increasing Diversity with Non-Standard Signal Sets in Wireless OFDM Systems,” IEEE, 1999, pp. 20-24.
Brisbin et al., “1-D and 2-D Hot Carrier Layout Optimization of N-LDMOS Transistor Arrays,” IEEE, 2002, pp. 120-124.

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