Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2000-06-27
2002-12-31
Kim, Hong Chong (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S113000, C711S114000, C710S308000
Reexamination Certificate
active
06502169
ABSTRACT:
FIELD OF INVENTION
The invention relates generally to the field of computer systems and more particularly to systems that employ disk storage based upon a redundant array of independent disks (RAID) implementation.
BACKGROUND OF THE INVENTION
A computer system includes an operating system whose primary function is the management of hardware and software resources in the computer system. The operating system handles input/output (I/O) requests from software processes or applications to exchange data with on-line external storage devices in a storage subsystem. The operating system (such as Windows NT® available from Microsoft, Corp. of Redmond, Wash.) forwards I/O requests to an I/O subsystem, which, in turn, converts the logical addresses into physical locations in the storage devices and commands the latter devices to engage in the requested storage or retrieval operations.
The on-line storage devices on a computer are configured from one or more disks into logical units of storage space referred to herein as “containers.” Examples of containers include volume sets, stripe sets, mirror sets, and various Redundant Array of Independent Disk (RAID) implementations. A volume set comprises one or more physical partitions, i.e., collections of blocks of contiguous space on disks, and is composed of space on one or more disks. Data is stored in a volume set by filling all of the volume's partitions in one disk drive before using volume partitions in another disk drive. A stripe set is a series of partitions on multiple disks, one partition per disk, that is combined into a single logical volume. Data stored in a stripe set is evenly distributed among the disk drives in the stripe set. In its basic configuration, a stripe set is also known as a “RAID 0” configuration. A mirror set is composed of volumes on multiple disks, whereby a volume on one disk is a duplicate copy of an equal sized volume on another disk in order to provide data redundancy. A basic configuration for a mirror set is known as “RAID 1.” There is often a desire to increase data reliability in a stripe set by using parity distributed across storage blocks with respect to each stripe. Where such parity is provided to the stripe set, the configuration is known as “RAID 5.” In an even more complex implementation, where stripe sets are mirrored on a plurality of containers—and redundant data is distributed across the stripes, the resulting configuration is known as “RAID 10.” Generally speaking, all configurations of the RAID implementation (RAID 0-10) provide a collection of partitions, where each partition is composed of space from one disk in order to support data redundancy.
According to a prior system, the I/O subsystem configures the containers through a software entity called a “container manager.” Essentially the container manager sets up a mapping structure to efficiently map logical addresses received from the operating system to physical addresses on storage devices. The I/O subsystem also includes a software is driver for each type of container configuration on the system. These drivers use the mapping structure to derive the physical addresses, which they then pass to the prospective storage devices for storage and retrieval operations.
Speed of data transfer and storage is an important aspect of RAID storage arrangement. Enhancing speed, where possible is highly desirable. In certain implementations, common patters of storage are found, such as where a preconfigured RAID is provided with all logical “zero” values. In fact, many applications write only one value across a large number of unique-pattern storage blocks (often all logical “zeros”). Where the central processing unit (CPU) is involved in the write to disk storage, caching of data and other processes result in significant uses of processor resources and overhead. This tends to delay other processor and bus activities.
Accordingly, it is an object of this invention to provide a more direct and efficient system and method for detecting blocks of unique values (zeroes, ones and a known combination) and writing such blocks to disk storage with minimum, or no processor intervention/overhead.
SUMMARY OF THE INVENTION
This invention overcomes the disadvantages of the prior art by providing a system and method that enables blocks of data having specific patterns or values to be handled differently by a memory storage system/adapter than other blocks, thereby increasing overall efficiency when these specific types of data blocks with unique data patterns are encountered. In a preferred embodiment, a direct memory access (DMA) engine is resident on a bus structure between a host processor system and the disk array, which can be configured as a redundant array of independent disks (RAID). A cache memory is also resident on the bus and is adapted to cache write data from the host under control of a cache manager prior to storage thereof in the disk array. The DMA engine is adapted to detect predetermined patterns of data as such data is transferred over the bus there through. Such data can include a series of consecutive zeroes or another repetitive pattern. Based upon predetermined criteria, the DMA instructs the cache manager that an identified repetitive pattern is being transferred, and the cache manager takes appropriate action to optimize the transaction in view of the specific repetitive nature of the block or blocks of data being detected.
The DMA engine can comprise a state-machine having counter and other combinatorial logic functions. It contemporaneously reads the bus on-the-fly as data passes therethrough. In one example, the detected blocks have a predetermined data pattern composed of all zeroes. The DMA engine notifies the cache manager of the existence of such a block, and the cache manager causes the block to bypass the cache memory in favor of a SCSI-based copying of zeroes to the disk free of further processor of host-to-cache bus (PCI bus) intervention. Detection of zeroes or another repetitive pattern can be based upon a counting by the DMA of a predetermined number of zeroes in a transmitted block. If that stated number of zeroes is detected, then the block is identified as a zero-only block and appropriate optimization procedures are implemented.
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