System and method for designing circuits in a SOI process

Details System and method for designing circuits in a SOI process System and method for designing circuits in a SOI process

2005-08-16

2005-08-16

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C326S095000

Reexamination Certificate

active

06931607

ABSTRACT:
A system and method is disclosed for designing a dynamic circuit in a silicon-on-insulator (SOI) process comprising the steps of representing the dynamic circuit using at least one logic circuit, wherein the at least one logic circuit is selected from a group consisting of: an OR circuit with a DNG field effect transistor (FET), an OR circuit, and an AND circuit, and wherein the at least one logic circuit is selected according to body voltage characteristics of each circuit in the group.

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U.S. Appl. No. 10/282,478, filed Oct. 29, 2002, Lachman.

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