System and method for deriving symbol timing

Details System and method for deriving symbol timing System and method for deriving symbol timing

2007-07-09

2009-12-15

Odom, Curtis B (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S229000, C375S232000, C375S233000, C375S234000

Reexamination Certificate

active

07634036

ABSTRACT:
A symbol timing derivation system derives receiver timing from received symbols which avoids the need for a pilot tone, thereby reducing power consumption and expanding usable bandwidth. The system is implemented by using a calculation that finds the timing phase error. The timing phase error is then averaged and controls a phase locked loop (PLL). This PLL in turn controls a voltage-controlled oscillator, which handles the modem receiver timing. A centroid calculation can be included to bias the voltage-controlled oscillator to push the equalizer coefficients back to the ideal position. The system can be implemented in either a point-to-point modem environment or a multi-point environment, for example, but not limited to, MVL or DMT. The voltage-controlled oscillator may also be implemented to control transmitter timing, so that the central office modem and the remote modem will operate more-or-less synchronously, reducing the need for large equalizer corrections at either end.

REFERENCES:
patent: 4532640 (1985-07-01), Bremer et al.
patent: 4940977 (1990-07-01), Mandell
patent: 5426671 (1995-06-01), Bergmans
patent: 6396884 (2002-05-01), Maruyama
patent: 6853695 (2005-02-01), Betts et al.
patent: 7248662 (2007-07-01), Betts et al.

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