Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
2006-06-27
2006-06-27
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C710S022000, C710S036000, C710S052000, C710S060000
Reexamination Certificate
active
07069348
ABSTRACT:
A system and method for upgrading data transmission performance under programmed input/output (PIO) mode is disclosed. In one embodiment, a PIO accelerating device is established in an IDE controller for handling data transmissions concerned with read/write operations after taking over associated control right from processing unit. A counter is configured in the PIO accelerating device for varying its stored content followed by a predetermined sequence in responsive to the input pulses of a system clock. A timing signal generator is also established in the PIO accelerating device for issuing signals directed to the IDE device and the buffer in the IDE controller for activating associated data transmission operations while the stored content reaches to a predetermined threshold. Optimal performance to data transmission under IO mode 4 of the PIO mode can be achieved by employing the disclosed hardware configuration.
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patent: 2001/0030561 (2001-10-01), Asano et al.
patent: 1369795 (2002-09-01), None
Chen Chung-Heng
Chuang Ying-Lang
Chen Alan S.
Huynh Kim
Sughrue & Mion, PLLC
Via Technologies Inc.
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