Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2008-12-12
2011-12-27
Gu, Shawn X (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S103000, C711S117000, C711S162000, C711S165000, C711S170000
Reexamination Certificate
active
08086794
ABSTRACT:
A system for data migration between a compute cluster and disk drives by inclusion of a buffer node coupled to the compute cluster to store data received therefrom in a random fashion. The buffer node signals the computer nodes to promptly return from the I/O cycle to the computing state to improve the duty cycle of the device. The system further includes a storage controller which is coupled between the buffer node and the disk drives to schedule data transfer activity between them. The data transfers are actuated in the sequence determined based on minimization of seeking time and tier usage, and harvest priority, when the buffer node either reaches a predetermined storage space minimal level or a predetermined time has elapsed since the previous I/O cycle. The storage controller deactivates the disk drives which are not needed for the data transfer.
Cole, Jr. Charles Dwain
Fellinger David F.
Piszczek Michael J.
DataDirect Networks, Inc.
Gu Shawn X
Rosenberg , Klein & Lee
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