Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-08-02
2010-06-29
Levin, Naum B (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C430S005000, C430S030000
Reexamination Certificate
active
07747978
ABSTRACT:
A system and a method for creating a focus-exposure model of a lithography process are disclosed. The system and the method utilize calibration data along multiple dimensions of parameter variations, in particular within an exposure-defocus process window space. The system and the method provide a unified set of model parameter values that result in better accuracy and robustness of simulations at nominal process conditions, as well as the ability to predict lithographic performance at any point continuously throughout a complete process window area without a need for recalibration at different settings. With a smaller number of measurements required than the prior-art multiple-model calibration, the focus-exposure model provides more predictive and more robust model parameter values that can be used at any location in the process window.
REFERENCES:
patent: 6749972 (2004-06-01), Yu
patent: 6828542 (2004-12-01), Ye et al.
patent: 6884984 (2005-04-01), Ye et al.
patent: 6954911 (2005-10-01), Pierrat
patent: 7003758 (2006-02-01), Ye et al.
patent: 7336341 (2008-02-01), Mimotogi et al.
patent: 7444615 (2008-10-01), Percin et al.
patent: 7488933 (2009-02-01), Ye et al.
patent: 7588868 (2009-09-01), Zach et al.
patent: 2004/0156030 (2004-08-01), Hansen
patent: 2004/0190008 (2004-09-01), Mieher et al.
patent: 2005/0166174 (2005-07-01), Ye et al.
patent: 2006/0273266 (2006-12-01), Preil et al.
Y. Cao et al. “Optimized Hardware and Software for Fast, Full Chip Simulation” Proc. SPIE vol. 5754, pp. 407-414, (2005).
B.J. Lin “The Exposure-Defocus Forest” Jpn. J. Appl. Phys. vol. 33, pp. 6756-6764 (1994).
A. Borjon et al. “High Accuracy 65nm OPC Verification: Full Process Window Model vs. Critical Failure ORC” Proc. SPIE vol. 5754, pp. 1190-1201 (2005).
B. Tollkuhn et al. “Do We Need Complex Resist Models for Predictive Simulation of Lithographic Process Performance?” Proc. SPIE vol. 5376, pp. 983-994 (2004).
Cao Yu
Chen Luoqi
Liu Hua-Yu
Ye Jun
ASML Netherlands B.V.
Levin Naum B
Pillsbury Winthrop Shaw & Pittman LLP
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