Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2011-01-18
2011-01-18
Bonzo, Bryce P (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
07873874
ABSTRACT:
A system for testing a processor. The system includes a gold processor and a test access port (TAP). A processor that is a under test (DUT) is coupled to both the gold processor and the TAP. Test signals are simultaneously provided to both the gold processor and the DUT such that the gold processor and the DUT operate in synchronous functional lockstep. The TAP may also input test signals into the gold processor and DUT simultaneously and access data from each of these processors through separate test data out (TDO) connections. Test output data accessed from the gold processor may be compared to test output data accessed from the DUT to determine if any differences are present. The comparison data generated may then be used for analysis purposes.
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Ayers Kevin E.
Choate Michael L.
Ryan Arthur M
Terrell Douglas L.
Advanced Micro Devices , Inc.
Bonzo Bryce P
Heter Erik A.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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