Electrical computers and digital data processing systems: input/ – Access arbitrating
Reexamination Certificate
2000-06-15
2003-09-30
Ray, Gopal C. (Department: 2187)
Electrical computers and digital data processing systems: input/
Access arbitrating
C710S107000
Reexamination Certificate
active
06629178
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to computer system, and more particularly, to bus arbitration on multi-master buses.
2. Description of the Relevant Art
Computer systems typically use buses as a primary means of communication between various peripheral devices and a central processing unit (CPU). A bus in which two peripheral devices may autonomously communicate with each other is referred to as a multi-master bus. Examples of such multi-master a bus includes the Peripheral Component Interconnect (PCI) bus and the Advanced Graphics Port (AGP) bus. In a multi-master bus, the peripheral given access to the bus is considered to be the master for the duration of the access. Multi-master buses typically utilize an arbitration unit, which may employ a scheme to decide which peripheral may have access to the bus. Such a scheme may be based on a number of factors, such as the order in which requests are received or time elapsed since initial request.
A given bus arbitration scheme may rely on the behavior of devices connected to the bus in order to function effectively. Typically, in order to ensure fair access to the bus by all devices (also known as “bus agents”), the bus may rely on each device to relinquish mastership of the bus once it completes its current data transfer, if so requested by a bus arbitration unit. In many such buses, a bus arbitration unit may have no mechanism, or limited mechanisms, to force a given bus agent to relinquish control of the bus. In such cases, some bus agents may continue data transfers indefinitely, to the detriment of other bus agents. This problem may particularly affect bus agents known as high-priority bus agents.
A high-priority bus agent is one in which access to the bus is critical with respect to time. High-priority bus agents may include devices that require data to be moved within a fixed time scale (latency-sensitive devices), and peripherals that require a quick response to or from an external device. Another category of high-priority bus agents are soft devices, in which a system processor accomplishes with software many functions that would be otherwise accomplished with hardware in the device. Soft devices may include soft modems and soft network interface cards, as well as an assortment of other devices. Soft devices may be used in many instances to replace “hard” devices, which may accomplish a majority of their functions in hardware with minimal use of the system processor.
In many instances, if a high-priority bus agent does not gain access within a certain time period, the data which it must transfer or receive may be lost. Such lost data may cause erroneous operation of a computer system, and in some situations, may lead to fatal errors. For example, a soft modem may include the normal modulation and demodulation circuitry of a normal modem, while replacing most of the remaining hardware functions with software. Such a soft modem may lack the buffering of a normal modem. Thus, when receiving a large amount of data, the soft modem may be required to perform its processing functions as soon as the data is received. If the soft modem cannot gain access to the bus, data sent by the source may be lost. In some cases, this data may be critical to the operation of other programs, and failure to properly receive and process the sent data may cause these programs to crash or malfunction. In general, such a scenario is possible for a wide variety of high-priority bus agents where data transfers must occur within a critical time period.
SUMMARY OF THE INVENTION
The problems outlined above may in large part be solved by a system and method for bus arbitration. In one embodiment, a computer system includes one or more buses for transferring data. Access to each bus may be controlled by an arbitration unit and a bus interface unit. In addition to a processor, various bus agents (i.e. peripherals) may also be coupled to the bus. Some bus agents may be designated as normal-priority agents, while other bus agents may be designated as high-priority bus agents. A high-priority bus agent may be a peripheral that is a latency-sensitive device. The arbitration unit may grant bus access to a normal-priority bus agent based on an arbitration scheme. When a high-priority bus agent requests access to the bus, the arbitration unit may cause the termination of access by the normal-priority bus agent. The high-priority bus agent may then be granted access to the bus. When the high-priority bus agent has completed its use of the bus, the arbitration unit may then allow the normal-priority bus agent (that had access just prior to the high-priority agent) to regain access to the bus.
In one embodiment, an arbitration unit may be configured to receive bus request signals from each of a plurality of bus agents coupled to the bus. The arbitration unit may be configured to distinguish between a bus request signal received from a normal-priority bus agent and one received from a high-priority bus agent. After receiving a bus request signal from a high-priority bus agent, the arbitration unit may assert a bus disconnect signal. The bus disconnect signal may be received by the bus interface unit. The bus interface unit may terminate access to the bus by the normal-priority bus agent, while the arbitration unit may assert a bus grant signal to be received by the high-priority bus agent. Responsive to receiving the bus grant signal, the high-priority bus agent may begin transmitting or receiving data across the bus.
In general, the system and method may apply to any type of bus. Common bus types include the PCI bus, the AGP bus, ISA (Industry Standard Architecture) and EISA (Extended Industry Standard Architecture) bus, the General Purpose Instrument Bus (GPIB), and so on.
Thus, in various embodiments, the system and method for bus arbitration may allow access to a bus by high-priority bus agents in a timely manner, thereby allowing such devices to complete operations with no loss of data. Allowing preferential bus access to high-priority bus agents may furthermore prevent erroneous operation of the computer system in which the agents are operating.
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Advanced Micro Devices , Inc.
Heter Erik A.
Merkel Lawrence J.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Ray Gopal C.
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