System and method for controlling an intergrated circuit to...

Details System and method for controlling an intergrated circuit to... System and method for controlling an intergrated circuit to...

2007-08-07

2007-08-07

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

C713S320000, C713S322000

Reexamination Certificate

active

09876291

ABSTRACT:
A computer system has multiple performance states. The computer system periodically determines utilization information for the computer system and adjusts the performance state according to the utilization information. If a performance increase is required, the computer system always goes to the maximum performance state. If a performance decrease is required, the computer system steps the performance state down to a next lower performance state.

REFERENCES:
patent: 5021679 (1991-06-01), Fairbanks et al.
patent: 5218704 (1993-06-01), Watts et al.
patent: 5511203 (1996-04-01), Wisor et al.
patent: 5682273 (1997-10-01), Hetzler
patent: 5719800 (1998-02-01), Mittal et al.
patent: 5745375 (1998-04-01), Reinhardt et al.
patent: 5787294 (1998-07-01), Evoy
patent: 5812860 (1998-09-01), Horden et al.
patent: 5838968 (1998-11-01), Culbert
patent: 5852737 (1998-12-01), Bikowsky
patent: 5873000 (1999-02-01), Lin et al.
patent: 5881298 (1999-03-01), Cathey
patent: 5884049 (1999-03-01), Atkinson
patent: 5887179 (1999-03-01), Halahmi et al.
patent: 5925133 (1999-07-01), Buxton et al.
patent: 5954820 (1999-09-01), Hetzler
patent: 5958058 (1999-09-01), Barrus
patent: 6006248 (1999-12-01), Nagae
patent: 6014611 (2000-01-01), Arai et al.
patent: 6073244 (2000-06-01), Iwazaki
patent: 6076171 (2000-06-01), Kawata
patent: RE36839 (2000-08-01), Simmons et al.
patent: 6097679 (2000-08-01), Ohtaki
patent: 6128745 (2000-10-01), Anderson et al.
patent: 6151681 (2000-11-01), Roden et al.
patent: 6442700 (2002-08-01), Cooper
patent: 6574740 (2003-06-01), Odaohhara et al.
patent: 6594753 (2003-07-01), Choquette et al.
patent: 6711129 (2004-03-01), Bauer et al.
patent: 6795927 (2004-09-01), Altmejd et al.
patent: 6829713 (2004-12-01), Cooper et al.
patent: 6845456 (2005-01-01), Menezes et al.
patent: 0632360 (1995-01-01), None
patent: 08328698 (1996-12-01), None
patent: 10198456 (1998-07-01), None
Advanced Configuration and Power Interface Specification, Jul. 27, 2000, Rev. 2, p. 23.
IBM Technical Disclosure Bulletin “Power Management Clock Change for 603 Processor”, vol. 38, No. 12, Dec. 1995, pp. 325-327.
PC NTMMTA: Using Performance Monitor with MMTA (Q130288), http://support.microsoft.com/default.aspx?scid=kb;en-us:Q130288 (3 pages) (last modified Aug. 8, 2001); printed Apr. 16, 2002.
Performance Monitor Collects Data for Only One Instance (Q101474), http://support.microsoft.com/default.aspx?scid=kb;en-us:Q101474 (2 pages) (last modified Nov. 5, 1999), printed Apr. 16, 2002.

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