Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1998-06-05
2002-07-23
Beausoleil, Robert (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S120000, C710S107000, C710S062000, C710S063000
Reexamination Certificate
active
06425033
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to computer architecture and more particularly to a system and method for interconnecting multiple PCI buses through a serial bus.
DESCRIPTION OF THE RELATED ART
The Peripheral Component Interconnect (PCI) Local Bus is a high performance, 32-bit or 64-bit bus with multiplexed address and data lines. It is intended for use as an interconnect mechanism between highly integrated peripheral controller components, peripheral add-in boards, and processor/memory systems. The PCI bus has emerged as a very popular expansion bus for many computer systems and embedded systems. A plethora of chipsets, devices, and controllers with a PCI bus interface have been marketed in the last few years. Examples of I/O functions performed by PCI products include high-speed graphics controllers, Small Computer System Interface (SCSI) controllers, Fiber Channel adapters, Serial Storage Architecture (SSA) adapters, and local area network (LAN) interface devices such as Ethernet, Token Ring and FDDI controllers.
Another popular I/O function in which PCI is used is in the area of instrumentation. An instrument is a device which collects data or information from an environment or unit under test and displays this information to a user. An instrument may also perform various data analysis and data processing on acquired data prior to displaying the data to the user. Examples of various types of instruments include data acquisition devices, oscilloscopes, digital multimeters, pressure sensors, etc. The types of information which might be collected by respective instruments include voltage, resistance, distance, velocity, pressure, frequency of oscillation, humidity or temperature, among others.
Modern instrumentation systems are moving from dedicated stand-alone hardware instruments such as oscilloscopes, digital multimeters, etc., to a concept referred to as virtual instrumentation. Virtual instrumentation systems comprise instrumentation hardware such as circuit boards which plug into general purpose personal computers. The instrumentation hardware is controlled by software which executes on the computers. Many virtual instrument hardware devices have been developed which plug into a PCI bus. Other popular instrumentation buses are the VXI (VMEbus eXtensions for Instrumentation) bus and General Purpose Interface Bus (GPIB).
In instrumentation applications, as well as others, often there is a need for the I/O function to be physically located remote from the host computer. For example, a data acquisition (DAQ) device may be required to be located in a test chamber which is separated by some distance from the host computer controlling it. One solution for remotely interfacing VXI instruments in a VXI chassis to a computer is the Multisystem eXtension Interface (MXI) bus.
The MXI bus is an open standard 32-bit general purpose system bus which interconnects up to eight MXI devices using a flexible cable. The MXI cable includes 32 multiplexed address and data lines with parity, address modifiers for multiple address spaces, single-level multi-master prioritized bus arbitration signals, a single interrupt line, a bus error line and handshake lines. MXI devices use memory-mapped read and write operations to access resources, such as registers and memory, of other MXI devices. The length of the MXI cable may be up to a maximum of 20 meters. In a typical configuration, a MXI interface card is connected to an expansion bus of the host computer, such as an ISA or PCI bus. Another MXI interface card is plugged into a VXI slot of the VXI instrument chassis, and the two interface cards are coupled together via a MXI cable.
One drawback of an MXI bus solution is the MXI bus interface cards and cables are not commodity items, and thus are relatively expensive. Thus, a solution is desired for remotely coupling PCI devices to a host computer. Since many PCI devices have already been developed, as well as associated device driver software for controlling them, it is highly desirable for the solution to require no modification to existing PCI device hardware and little or no modification to their associated device driver software.
One method currently used in the industry to connect PCI devices in a robust mechanical factor is CompactPCI. CompactPCI is an adaptation of the PCI mechanical form factor for industrial and/or embedded applications requiring a more robust mechanical form factor than Desktop PCI. CompactPCI is electrically compatible with the PCI specification and provides an optimized system for rugged applications. A new instrumentation standard based on the CompactPCI form factor is referred to as PXI (PCI eXtensions for Instrumentation).
It would be desirable for PCI expansion devices coupled to a remote PCI or PXI bus to appear to the computer. system as if they were coupled directly to the local PCI bus in the computer system.
SUMMARY OF THE INVENTION
The present invention comprises a Wide Area Serial PCI system for connecting peripheral devices to a computer. The system comprises a host computer system which includes a CPU and memory, and also includes a first Peripheral Component Interconnect (PCI) bus. A primary bridge according to the present invention is coupled to the first PCI bus. The primary bridge includes PCI interface circuitry for interfacing to the first PCI bus. A remote device is located remotely from said computer system, wherein the remote device comprises a second or remote PCI bus and one or more peripheral devices coupled to the second PCI bus. A secondary bridge is coupled to the second PCI bus, wherein said secondary bridge includes PCI interface circuitry for interfacing to the second PCI bus. A serial bus is coupled between the primary bridge and the secondary bridge.
The primary bridge and secondary bridge are operable to transmit PCI bus cycles over the serial bus. The primary bridge is operable to receive PCI cycles on the first PCI bus and generate serial data on the serial bus in response thereto, and the secondary bridge is operable to receive the serial data from the serial bus and generate corresponding PCI cycles on the second PCI bus. In a similar manner the secondary bridge is operable to receive PCI cycles on the second PCI bus and generate serial data on the serial bus in response thereto, and the primary bridge is operable to receive the serial data from the serial bus and generate corresponding PCI cycles on the first PCI bus. In this manner, the CPU in the host computer system is operable to generate cycles on the first PCI bus to communicate with peripheral devices coupled to the second PCI bus. Likewise, the peripheral devices in the remote device coupled to the second or remote PCI bus can generate cycles on the second PCI bus to communicate with the CPU, memory or other devices in the computer system.
Thus, according to the present invention, the CPU is operable to generate cycles on the first PCI bus to communicate with a peripheral device, wherein the peripheral device is coupled to either the first PCI bus or the second PCI bus. In addition, software developed to communicate with a peripheral device coupled to the first PCI bus of the host computer can also be used to communicate with the peripheral device regardless of whether the peripheral device is coupled to the first PCI bus or the second PCI bus. Thus, to the CPU, the one or more peripheral devices coupled to the second PCI bus appear coupled to the first PCI bus. Stated another way, the one or more peripheral devices coupled to the second PCI bus are virtually coupled to said first PCI bus.
Each of the primary bridge and secondary bridge include parallel/serial transceivers for converting parallel data generated on the first PCI bus and second PCI bus, respectively, to serial data for transmission on the serial bus and for converting serial data received from the serial bus to parallel data for generation on the first PCI bus and second PCI bus, respectively. The primary bridge and the secondary bridge collectively implement a PCI—PCI bridge register s
Conway Craig M.
Hormuth Robert
Mitchell Bob
Odom B. Keith
Sabolcik Ross
Beausoleil Robert
Conley Rose & Tayon
Hood Jeffrey C.
National Instruments Corporation
Phan Raymond N
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