Computer graphics processing and selective visual display system – Computer graphics display memory system – Frame buffer
Reexamination Certificate
2005-11-01
2005-11-01
Bella, Matthew C. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Frame buffer
C345S629000
Reexamination Certificate
active
06961064
ABSTRACT:
Generally, graphics are displayed on a monitor or printed on an output device after a series of steps are performed, typically implemented in the form of a graphics pipeline, in the case of an object-oriented graphic image. Similarly, a digital picture or digital video image passes through a digital pipeline for the digital image or images to be displayed, printed, or otherwise processed. The present invention encompasses a system and method in which the stages of the graphics pipeline used to process a graphic object are interconnected to the stages of the digital pipeline used to process a bit-mapped image so that a single, interconnected pipeline can be used to process object-oriented graphic images, bit map images and/or images which contain graphics and bit map portions. This interconnected pipeline can be used to process images through various stages of the graphics pipeline followed by stages typically contained in the digital pipeline, or vice versa, to create desired effects. This interconnected pipeline includes a switch or a selectively configurable interconnection matrix which defines an image path which connects desired stages of the pipeline.
REFERENCES:
patent: 5598525 (1997-01-01), Nally et al.
patent: 5861893 (1999-01-01), Sturgess
patent: 5943064 (1999-08-01), Hong
patent: 5977960 (1999-11-01), Nally et al.
Bella Matthew C.
Hewlett--Packard Development Company, L.P.
Singh Dalip K.
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