System and method for clock phase recovery

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate

Reexamination Certificate

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C713S400000

Reexamination Certificate

active

10830230

ABSTRACT:
A clock may be generated having a predetermined unit interval. Received data may then be compared to the virtual clock to determine whether more than one data change occurs during a particular unit interval. If more than one data change occurs during a particular unit interval, the virtual clock may not correspond to the source clock. The virtual clock may then be incremented by a phase shift offset and the data analyzed again. When a phase shift virtual clock is identified that aligns with the data such that a plurality of data changes do not occur during a given unit interval, the embodiment may determine that a passing virtual clock may have been identified.

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