Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate
Reexamination Certificate
2007-02-27
2007-02-27
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Correction for skew, phase, or rate
C713S400000
Reexamination Certificate
active
10830230
ABSTRACT:
A clock may be generated having a predetermined unit interval. Received data may then be compared to the virtual clock to determine whether more than one data change occurs during a particular unit interval. If more than one data change occurs during a particular unit interval, the virtual clock may not correspond to the source clock. The virtual clock may then be incremented by a phase shift offset and the data analyzed again. When a phase shift virtual clock is identified that aligns with the data such that a plurality of data changes do not occur during a given unit interval, the embodiment may determine that a passing virtual clock may have been identified.
REFERENCES:
patent: 4819080 (1989-04-01), Cucchietti et al.
patent: 5361277 (1994-11-01), Grover
patent: 5903605 (1999-05-01), Crittenden
patent: 6643612 (2003-11-01), Lahat et al.
patent: 6661860 (2003-12-01), Gutnik et al.
patent: 6665317 (2003-12-01), Scott
patent: 6775300 (2004-08-01), Kuo
patent: 6868534 (2005-03-01), Fattouh et al.
patent: 6983394 (2006-01-01), Morrison et al.
patent: 2004/0133375 (2004-07-01), Kattan
patent: 2005/0007952 (2005-01-01), Scott
patent: 2005/0200393 (2005-09-01), Furtner
Bachmeier Felix A.
Easter Jonathan P.
Cao Chun
Connolly Mark
Intel Corporation
Schutz James E.
Troutman Sanders LLP
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