Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-01-23
2007-01-23
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S132000
Reexamination Certificate
active
10294091
ABSTRACT:
Systems and methods that cache are provided. In one example, a system may include a spatial cache system coupled to a processing unit and to a memory. The spatial cache system may be adapted to reduce the memory latency of the processing unit. The spatial cache system may be adapted to store prefetched blocks, each stored prefetched block including a plurality of cache lines. If a cache line requested by the processing unit resides in one of the stored prefetched blocks and does not reside in the processing unit, then the spatial cache system may be adapted to provide the processing unit with the requested cache line.
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So Kimming
Wang Jin Chin
Broadcom Corporation
Kim Matthew
McAndrews Held & Malloy Ltd.
Tsai Sheng-Jen
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