Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-06-27
2006-06-27
Nguyen, T (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S141000, C711S144000
Reexamination Certificate
active
07069384
ABSTRACT:
A system (10) uses shared resources (44, 54) to perform conventional load/store operations, to preload custom data from external sources, and to efficiently manage error handling in a cache (42, 52, 48). A reload buffer (44, 54) is used in conjunction with a cache (42, 52) operating in a write-through mode to permit lower level memory in the system to operate in a more efficient write-back mode. A control signal (70) selectively enables the pushing of data into the cache (42, 52, 48) from an external source. The control signal utilizes one or more attribute fields that provide functional information and define memory characteristics.
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Bruce Magnus K.
Hoy Thomas A.
Jalal Jamshed
Snyder Michael D.
Freescale Semiconductor Inc.
King Robert L.
Nguyen T
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