System and method for bypassing supervisory memory intervention

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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Details

711156, 711148, 711119, 711141, 710132, G06F 1300

Patent

active

061674893

ABSTRACT:
A system and method for providing direct transfers of data segments between devices having local memories without the need for first transferring the data to a central supervisory memory to maintain cache coherency. Direct data transfers are performed from a first local memory of a first device to a second local memory in a second device in a transaction processing system that includes a main memory to provide supervisory storage capability for the transaction processing system, and a directory storage for maintaining ownership status of each data segment of the main memory. A data transfer of a requested data segment is requested by the second device to obtain the requested data segment stored in the first local memory of the first device. The requested data segment is removed from the first local memory in response to the data transfer request, and is directly transferred to the second local memory of the second device. The requested data segment is also transferred to the main memory, and to the directory storage where the ownership status can be revised to reflect a change of ownership from the first device to the second device. The direct transfer of the requested data segment between the first and second devices occurs independently of the transfer of the requested data segment from the first device to the main memory and directory storage.

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