System and method for analyzing a semiconductor surface

Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S750000, C438S753000, C438S754000, C438S756000

Reexamination Certificate

active

06420275

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to analyzing a semiconductor surface. In particular, the invention relates to analyzing an isolated area on a wafer surface.
2. Background
There are many methods for obtaining samples from the surfaces of wafers for determination of surface contamination and bulk analysis. One common technique for determining surface contamination is vapor phase deposition (VPD). In this method, an etchant such as hydrofluoric acid is vaporized, and the surface of the wafer is exposed to the vapor. The etchant vapor forms a fog on the surface.
A droplet of deionized water with a low concentration of hydrofluoric acid and optionally hydrogen peroxide is then placed on the surface of the wafer, and a robot tilts the wafer so that the droplet rolls across the surface, gathering up the etchant fog with the dissolved contaminants. The droplet and dissolved contaminants are analyzed by appropriate analytical methods such as with a spectrometer. The concentration of contaminants per unit surface area of wafer is calculated as the total quantity of contaminant in the droplet divided by the total surface area of the wafer. This sampling method therefore cannot be used to obtain spatial information on the contaminant levels as a function of position on the wafer. Rather, the total contaminant level on the entire surface is obtained.
Bulk analyses of the composition of wafers have also been obtained by dipping the wafer into an etchant to dissolve a portion of the wafer and analyzing the constituents in the etchant. The wafer is weighed before and after dipping in the etchant solution to determine how much of the wafer dissolved. The bulk analysis is assumed to be the weight of each constituent in the etchant solution divided by the weight of the wafer which dissolved. The bulk analysis by this technique is often imprecise. Further, the composition of the wafer as a function of the position on the wafer cannot be determined by this sampling method.
It is possible to etch a wafer as a function of position as disclosed by U.S. Pat. No. 5,271,798. However such an approach does not appear to analyze the wafer composition as a function of position.
SUMMARY OF THE INVENTION
The invention obtains a sample from a localized section of a wafer. A sampling apparatus isolates a section of the wafer and then dispenses liquid onto the isolated section. After the liquid has dissolved elements of interest in or on the wafer, a sample of the liquid is transferred to an analyzer. The liquid can be an etching solution, an organic solvent, or other suitable solvent. An analysis of the wafer can thus be obtained as a function of position on the wafer. Furthermore, an analysis of the materials located at different depths within the wafer can be obtained.
One embodiment of the invention relates to a method for sampling and analyzing a selected portion of a semiconductor wafer. The method comprises isolating a portion of a wafer, and dispensing a liquid onto the isolated portion of the wafer. The method also comprises removing at least a portion of the liquid and analyzing the liquid.
Another embodiment of the invention relates to a method for selectively analyzing a wafer surface. The method comprises obtaining a sample from an isolated portion of a wafer and analyzing the sample. An additional embodiment of the invention relates to a method for evaluating a selected section of a wafer. The method comprises dispensing a liquid onto a selected section of a wafer and pumping or moving a portion of the liquid from the selected section of the wafer.
Another embodiment of the invention relates to a method for analyzing a material selectively removed from a portion of a wafer. The method comprises forming a seal between a portion of a sampling apparatus and a portion of a wafer, thereby isolating a portion of the wafer. The method also comprises dispensing a liquid onto the isolated portion of the wafer, and removing part of the liquid from the isolated area to form a sample. The method further comprises analyzing the sample.
An additional embodiment relates to a method for evaluating an isolated section of a wafer. The method comprises dispensing an etchant onto an isolated section of a wafer and transferring a portion of the etchant from the isolated section of the wafer. The method also comprises analyzing the etchant as a function of time.
One aspect of the invention relates to a sampling apparatus for selectively evaluating portions of a wafer. The apparatus comprises a first tube that is configured to isolate a portion of a wafer. The apparatus also comprises a second tube that is configured to dispense a liquid onto the isolated portion of the wafer. The apparatus further comprises transfer tubing that is configured to transfer a portion of the liquid to an analyzer.
Another aspect of the invention relates to a test system that evaluates isolated portions of a semiconductor wafer. The test system comprises a sampling apparatus that is configured to dispense a liquid onto an isolated section of a wafer. The sampling apparatus comprises an outer tube that forms a seal between the outer tube and the isolated section of the wafer. The sampling apparatus also comprises an inner tube within the outer tube. The inner tube is configured to dispense a liquid within the isolated section of the wafer.
The testing system also comprises transfer tubing comprising a first end and a second end. The first end is connected to the outer tube of the sampling apparatus and the second end is connected to an analysis system. The transfer tubing further comprises a flexible outer surface wherein the transfer tubing is configured to transfer a portion of the liquid from the sampling apparatus to an analysis system.
The testing system further comprises a peristaltic pump or other pumping or liquid transfer system in communication with a portion of the flexible outer surface of the transfer tubing. The peristaltic pump is configured to direct the liquid in the transfer tubing to the analysis system.
Another embodiment of the invention relates to a semiconductor testing apparatus. The semiconductor testing apparatus comprises a sampling apparatus that is configured to dispense a liquid onto an isolated section of a wafer. The semiconductor testing apparatus further comprises transfer tubing that is in communication with the sampling apparatus. The transfer tubing is configured to transfer a portion of the liquid from the sampling apparatus. The semiconductor testing apparatus also comprises a peristaltic pump or other pumping or liquid transfer system that is in communication with the transfer tubing. The peristaltic pump is configured to direct the liquid in the transfer tubing to an analyzer.
An additional embodiment of the invention relates to a semiconductor testing apparatus. The semiconductor testing apparatus comprises a first means for isolating a portion of a wafer. The first means also dispenses a liquid onto the isolated portion of the wafer. The semiconductor testing apparatus further comprises a second means in communication with the first means. The second means transfers a portion of the liquid to an analysis system. The semiconductor testing apparatus also comprises a third means for transferring the liquid through the second means.
For the purposes of summarizing the invention, certain aspects, advantages and novel features of the invention have been described herein. It is to be understood that not necessarily all such advantages may be achieved in accordance with any particular embodiment of the invention. Thus, the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other advantages as may be taught or suggested herein.


REFERENCES:
patent: 4104026 (1978-08-01), Brooker et al.
patent: 4894529 (1990-01-01), Borden et al.
patent: 4920071 (1990-04-01), Thomas
patent: 4926021 (1990-05-01), Streusand et al.
patent: 4990459 (1991-02-01), Maeda et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

System and method for analyzing a semiconductor surface does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for analyzing a semiconductor surface, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for analyzing a semiconductor surface will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2856427

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.