Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1997-10-01
1998-09-01
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711149, 711150, 711168, 395872, G06F 1316, G06F 1200
Patent
active
058025529
ABSTRACT:
A flash memory device having a page buffer circuit providing a shared resource between a flash array controller circuit and a user. The page buffer circuit comprises a Plane A and a Plane B, wherein each of the planes A and B is a static random access memory array. The page buffer circuit further comprises a mode control circuit for enabling access to the planes A and B over a host bus in a user mode and access to the planes A and B by the flash array controller in a flash array controller mode.
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"Serial 9Mb Flash EEPROM for Solid State Disk Applications"; Gregor et al, Symposium on VLSI Circuits Digest of Technical Papers; 1992; pp. 24-25.
Durante Richard J.
Fandrich Mickey L.
Jungroth Owen
Rashid Mamun
Bragdon Reginald G.
Chan Eddie P.
Intel Corporation
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