Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
2011-08-23
2011-08-23
Chen, Alan (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S029000, C710S052000, C709S223000, C709S238000
Reexamination Certificate
active
08006006
ABSTRACT:
Systems and methods for aggregating transmit completion interrupts for multiple packets are provided. A network device can include a buffer with multiple memory locations capable of temporarily storing a packet being transmitted across the network via the network device and nodes connected to the network device. The network device can include a high watermark for determining when to process transmit completion interrupts. If the number of packets stored in the memory exceeds the high watermark, an aggregated transmit completion interrupt for all of the packets can be processed. Otherwise, the network device waits until sufficient packets are received to reach the high watermark.
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Chen Alan
International Business Machines - Corporation
King & Spalding LLP
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