Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1999-12-22
2003-09-30
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06629310
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to software architectures and, more particularly, to software architectures for programming different integrated circuits.
BACKGROUND OF THE INVENTION
The electronics industry continues to rely upon advances in semiconductor manufacturing technology to realize higher-functioning devices while improving reliability and cost. For many applications, the manufacture of such devices is complex, and maintaining cost-effective manufacturing processes while concurrently maintaining or improving product quality is difficult to accomplish. As the requirements for device performance and cost become more demanding, realizing a successful manufacturing process becomes more difficult.
A byproduct of the increased complexity of semiconductor devices includes ongoing increases in their density and in their configurability. In many instances, the configurability of an integrated circuit (IC) increases significantly with the number of possible applications for the IC. Typically, the configurability of an IC is defined using an internal register that is programmed during or after the IC's manufacture. The internal register, or registers as the case may be, includes bits that are assigned individually or in groups to indicate the functionality of circuitry associated with the IC.
In a typical test application, for example, an IC can have one or more internal registers for passing test data and test control information through various functional stages of the circuitry internal to the IC. Certain bits in the internal registers can be assigned to enable the test mode and disable normal functionality, and other bits in the internal registers can be assigned to identify selected ones of the functional stages and their operation during the test cycles. Different ICs typically have different and unique internal register arrangements and bit assignments.
In applications other than the testing of ICs, configuring the IC is also helpful. For instance, it is often advantageous economically to manufacture a single IC that can be configured to operate in alternative modes with each mode dedicated to a different one of several target markets. Cordless telephones, for example, use chip sets that can be configured for various features. Internal registers are useful in this context for defining which of the various features are to be enabled for implementation at the retail level.
The above applications are representative of many applications in which a CPU is programmed to configure the internal registers of different types of ICs. A CPU is typically defined to access different source programs, with one source program for each type of IC so that the CPU can access the IC's uniquely-defined internal registers. In the area of IC testing, a computer is programmed to conduct tests using a software program customized for the IC device under test. The computer is coupled to an interface board via a conventional communications channel, and the IC is connected to the interface board. Thus, for different ICs there are different test programs designed to access and configure the internal registers of each IC. Since testing each IC is accomplished with a different test program, managing and maintaining many such programs can be cumbersome and error prone. For a change in testing that is required for each of the ICs, each of the test programs would have to be changed, resulting in additional expenditure of time and an increased possibility of introducing an error in each test program.
Accordingly, there is a need for an approach that addresses the aforementioned problems, as well as other related problems. Various embodiments of the present invention provide processes and arrangements for overcoming these problems while providing a number of other advantages as will become apparent from the discussion that follows.
SUMMARY OF THE INVENTION
In various embodiments, the invention provides a method for accessing an integrated circuit (IC) using generic models to model the interface on the physical communication, register map and register semantics levels. This IC-specific information can be kept in an IC definition file that is separate from, and retrievable by, the software source program. By loading the IC-specific information from an IC definition file, the program automatically re-configures itself for the IC at hand. This approach of using the same source codes for many ICs provides significant advantages. For example, in the manufacture and test area, significant time savings are realized in terms of software development, software testing, software documentation and software support. Further, the approach allows for concurrent interface software development and testing while an IC is in design, thereby realizing a working source program even before the IC or even its precise specification is defined.
One embodiment of the present invention is directed to a method for accessing an internal register in one of a plurality of different types of ICs by using a plurality of corresponding models for the different types of ICs. Each of the respective models includes internal-register data that is specific to one of the ICs. Using a programmable processor arrangement, one of the models is loaded into an existing program and translated for use by the programmable processor arrangement. The translated model is then used to access the internal register in an IC corresponding to the loaded model, as though the existing program was specifically designed for the targeted IC.
Another aspect of the present invention is directed to a programmable processor arrangement for accessing an internal register in an IC, where the programmable processor arrangement includes control circuitry and memory circuitry. The control circuitry includes a programmable processor, and the memory circuitry includes program data adapted to be executed by the programmable processor arrangement and to cause the programmable processor to load one of a plurality of respective models for different types of ICs. Each of the respective models includes internal-register data that is specific to an IC, and is adapted to translate the loaded model and to use the translated model to access the internal register in an IC corresponding to the loaded model.
The above summary of the present invention is not intended to describe each disclosed embodiment of the present invention. The figures and detailed description that follow provide additional example embodiments and aspects of the present invention.
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Geven Albertus Franciscus Maria
Hessel Henk Albert
Naley Mark Douglas
Wong-Lam Ho Wai
Koninklijke Philips Electronics , N.V.
Lin Sun James
Vodopia John
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