System and method for accessing data between a host bus and syst

Details System and method for accessing data between a host bus and syst System and method for accessing data between a host bus and syst

1992-12-24

1999-09-28

Ellis, Richard L.

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

710 66, G06F 1202

Patent

active

059604506

ABSTRACT:
A microcomputer system memory architecture and method allows the system memory to provide data access at high speeds in a burst mode. The architecture and method utilizes a system memory controller capable of performing the addressing of the system memory. The microprocessor and the system memory communicate via a high speed host bus. The system memory is comprised of multiple 64-bit system memory buses to permit high speed data transfer to the microprocessor in a burst mode without the need for an external cache.

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