System and method for accelerated clock synchronization of...

Details System and method for accelerated clock synchronization of... System and method for accelerated clock synchronization of...

2006-09-12

2006-09-12

Phu, Phuong (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S375000, C375S222000

Reexamination Certificate

active

07106823

ABSTRACT:
A timing recovery system and method for accelerated clock synchronization of remotely distributed electronic devices is provided. The system includes a phase locked loop, a linear estimator and control logic. The method includes sampling a clock signal received from an electronic device, applying a linear estimation technique to estimate the frequency and phase of the received signal and providing those estimates to a phase locked loop to accelerate the phase locked loop acquisition rate and secure signal lock quickly.

REFERENCES:
patent: 5598396 (1997-01-01), Horibe et al.
patent: 6490295 (2002-12-01), Cooklev et al.
patent: 6563897 (2003-05-01), Kitta

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