Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2011-03-15
2011-03-15
Spittle, Matthew D (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S316000, C340S002100, C340S002200, C712S011000, C712S012000, C712S013000, C712S032000, C712S033000
Reexamination Certificate
active
07908422
ABSTRACT:
A system and method for single hop, processor-to-processor communication in a multiprocessing system over a plurality of crossbars are disclosed. Briefly described, one embodiment is a multiprocessing system comprising a plurality of processors having a plurality of high-bandwidth point-to-point links; a plurality of processor clusters, each processor cluster having a predefined number of the processors residing therein; and a plurality of crossbars, one of the crossbars coupling each of the processors of one of the plurality of processor clusters to each of the processors of another of the plurality of processor clusters, such that all processors are coupled to each of the other processors, and such that the number of crossbars is equal to [X*(X−1)/2], wherein X equals the number of processor clusters.
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Gostin Gary B.
Shaw Mark E.
Hewlett--Packard Development Company, L.P.
Spittle Matthew D
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