System and method featuring a controller device and a memory...

Details System and method featuring a controller device and a memory... System and method featuring a controller device and a memory...

2006-02-14

2006-02-14

Verbrugge, Kevin (Department: 2189)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

C711S115000

Reexamination Certificate

active

07000062

ABSTRACT:
A system comprises a master device and a first integrated circuit buffer device. A first plurality of integrated circuit memory devices are coupled to the first integrated circuit buffer device. A first plurality of signal lines are coupled to the first integrated circuit buffer device and the master device, wherein the first plurality of signal lines communicate control information, address information and data from the master device to the first integrated circuit buffer device. A second plurality of signal lines are coupled to the first integrated circuit buffer device. A second integrated circuit buffer device is coupled to the second plurality of signal lines, the second integrated circuit buffer device receives the control information, the address information and the data from the first integrated circuit buffer device over the second plurality of signal lines. A second plurality of integrated circuit memory devices are coupled to the second integrated circuit buffer device. A third plurality of signal lines are coupled to the first integrated circuit buffer device, the second integrated circuit buffer device and the master device. The third plurality of signal lines communicate information from the master device that initialize the first integrated circuit buffer device and the second integrated circuit buffer device.

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