Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output addressing
Reexamination Certificate
2001-11-21
2004-04-27
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output addressing
C710S004000, C710S015000, C710S016000, C710S019000, C710S038000, C710S041000, C709S238000
Reexamination Certificate
active
06728789
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to the field of fibre channel devices, and particularly to an apparatus, system and method for enabling access and transfer of data.
BACKGROUND OF THE INVENTION
The access, transfer and storage of electronic data is one of the most important aspects of modern life. From business to personal use, electronic data is utilized to make lives easier, as information representing transactions, personal data, business, and the like is stored and transferred quickly and accurately. By communicatively linking systems, data may be transferred to provide this functionality.
To provide consistent and persistent access to data, a variety of paths to the data, as well as data saving schemes may be employed. However, these schemes may require high data bandwidth, may be resource intensive, and may be incompatible across a variety of architectures. Further, such methods may result in complications to future development of products, devices and systems.
Further, a variety of host configurations may be encountered, each of which may cause complications in the use of an input/output interface. For example, hosts may utilize different operating systems, implement different applications, and the like, which have different communication requirements. Therefore, to provide connectivity to a target device, the host was configured for the type of interface supported by the target device. Such support may require extensive re-writing of host software, and may require extensive changes to an input/output device.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a system and method for employing a static logical identifier. The present invention provides an efficient methodology that may map a host's view of a target's address, such as a bus/id, to a protocol chip's view. For instance, a look-up table may be utilized in conjunction with a logical identifier of the present invention to improve chip performance. In a first aspect of the present invention, an input/output interface suitable for communicatively coupling a host with a target device includes at least one port communicatively coupling the input/output interface with a host and at least one port communicatively coupling the input/output interface with a target. A controller is communicatively coupled to the ports. When the controller receives an identifier from the host, the identifier indicating the target's address, the controller generates a logical identifier from the identifier, the logical identifier suitable for being utilized in conjunction with a look-up table to provide access to the target.
In a second aspect of the present invention, a method for providing data transfer between a host with a target utilizing an input/output interface includes receiving an identifier including a bus field and an ID field from the host, generating a logical identifier from the received identifier, and referencing a look-up table utilizing the logical identifier, the look-up table providing access to the target.
In a third aspect of the present invention, an input/output interface suitable for communicatively coupling a host with a target device includes at least one port communicatively coupling the input/output interface with a host and at least one port communicatively coupling the input/output interface with a target. A controller is communicatively coupled to the ports. When the controller receives an identifier including a bus field and an ID field from the host, the controller shifts at least one of the bus field and the ID field into a linear value to generate a logical identifier, the logical identifier suitable for being utilized in conjunction with a look-up table to provide access to the target.
It is to be understood that both the forgoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention and together with the general description, serve to explain the principles of the invention.
REFERENCES:
patent: 6137797 (2000-10-01), Bass et al.
patent: 6587959 (2003-07-01), Sjolander et al.
Clegg Roger T.
Odenwald Louis H.
Gaffin Jeffrey
LSI Logic Corporation
Peyton Tammara
Suiter - West PC LLO
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