System and method based on field-effect transistors for...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S414000, C257S421000, C257S422000, C257SE23019, C257SE23024

Reexamination Certificate

active

07569877

ABSTRACT:
A system and method for selecting nanometer-scaled devices. The method includes a plurality of semiconductor wires. Two adjacent semiconductor wires of the plurality of semiconductor wires are associated with a separation smaller than or equal to 100 nm. Additionally, the system includes a plurality of address lines. Each of the plurality of address lines includes a gate region and an inactive region and intersects the plurality of semiconductor wires at a plurality of intersections. The plurality of intersections includes a first intersection and second intersection. The first intersection is associated with the gate region, and the second intersection is associated with the inactive region.

REFERENCES:
patent: 6225236 (2001-05-01), Nishimoto et al.
patent: 6828639 (2004-12-01), Nejad et al.

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