Synthesis of a synchronization clock

Details Synthesis of a synchronization clock Synthesis of a synchronization clock

2005-09-06

2005-09-06

Browne, Lynne H. (Department: 2116)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S375000, C713S400000, C713S401000, C713S500000, C713S501000, C713S502000, C713S503000, C375S354000, C375S355000, C375S368000, C375S371000, C326S093000, C711S167000

Reexamination Certificate

active

06941484

ABSTRACT:
A method, system, and device capable of generating one or more clocks internally to detect, sample, and receive synchronous data streams and eliminate the need for corresponding external synchronization clocks for each data stream. One aspect of the clock generator provides a two-stage interpolation system. In a first stage, two clocks are selected which accurately detect a calibration data sample. In a second stage, a single, fine-tuned, clock is synthesized by interpolating the two selected clocks.

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