Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-06-09
2008-11-18
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07454738
ABSTRACT:
A logic synthesis method to apply supply gating to idle portions of general logic circuits in their active mode of operation to reduce power requirements and the circuits resulting therefrom. A Shannon expansion is utilized to determine idle portions and active portions of the general logic circuits.
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Banerjee Nilanjan
Bhunia Swarup
Chen Qikai
Mahmoodi Hamid
Roy Kaushik
Bose McKinney & Evans LLP
Purdue Research Foundation
Whitmore Stacy A
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