Synchronous semiconductor memory device allowing fast operation

Details Synchronous semiconductor memory device allowing fast operation Synchronous semiconductor memory device allowing fast operation

1997-12-18

1999-03-09

Fears, Terrell W.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523004, 365235, G11C 1300

Patent

active

058810170

ABSTRACT:
SDRAM 1000 outputs data, in a 2-bit prefetch operation, by simultaneously selecting two columns in memory cell array banks A0 and A1 in accordance with column select signals YE0-YEk and YO0-YOk issued from Y-address operation circuit 68. In a full page mode, data are output from all columns crossing rows alternately selected in memory cell array banks A0 and A1 in accordance with an internal address signal issued from a Y-address counter circuit 82.

REFERENCES:
patent: 4092734 (1978-05-01), Collins
patent: 5537354 (1996-07-01), Mochizuki et al.
"16Mbit Synchronous DRAM with 125Mbyte/sec Data Rate," Choi et al., 1993 Symposium on VLSI Circuits, pp. 65-66.

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