Synchronous semiconductor device and method of preventing...

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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C365S063000

Reexamination Certificate

active

06999375

ABSTRACT:
A synchronous semiconductor device and a method for preventing coupling between data buses. The synchronous semiconductor device supports at least two kinds of bit configuration modes and includes a first data bus and a second data bus. The first data bus is used to transmit data in a first bit configuration mode and used as a shielding line in a configuration mode other than the first bit configuration mode. The second data bus is used to transmit data in the first bit configuration mode and a second bit configuration mode and used as a shielding line in a configuration mode other than the first bit configuration mode and the second bit configuration mode. The first data bus and the second data bus are arranged alternately. In using the device and method, it is possible to prevent coupling between the data buses without additional shielding lines by using the same kind of data bus, which is not used to transmit data, as the shielding line.

REFERENCES:
patent: 6189133 (2001-02-01), Durham et al.
patent: 6388277 (2002-05-01), Kobayashi et al.
patent: 6522599 (2003-02-01), Ooishi et al.
patent: 6574163 (2003-06-01), Maeda
patent: 6778454 (2004-08-01), Duh et al.
patent: 2000-29923 (2000-01-01), None

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