Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration
Reexamination Certificate
1998-10-15
2001-05-22
Heckler, Thomas M. (Department: 2182)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Reexamination Certificate
active
06237090
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the operation of microprocessors and microcontrollers, and more particularly, to systems for resetting microprocessors and microcontrollers.
BACKGROUND OF THE INVENTION
The resetting of a microcontroller may be controlled externally by a user. The user often has the capability for resetting the microcontroller by simply pressing an appropriate key. The resetting may also take place without any external command during activation of a signal known as a “watch-dog” signal.
The microcontroller includes a microprocessor and a set of program memories. When a central processing unit (CPU) of the microprocessor is active, it periodically sends out a signal to the watch-dog circuit. This signal confirms operation of the CPU. When the CPU becomes inactive for a certain period, the watch-dog circuits sends out a watch-dog signal for prompting resetting of the microprocessor. Whether resetting of the microprocessor has been decided by the user or whether it has occurred following transmission of the watch-dog signal, a resetting signal internal to the microprocessor is generated. The microprocessor is then initialized to a predefined default state.
The internal resetting signal is active for a period of time, which is dependent upon characteristics of each microprocessor. This time represents the duration of the internal resetting sequence. The external resetting signal or the watch-dog signal may remain active for a period greater than this characteristic time. Accordingly, the internal resetting signal remains active for as long as these other signals are active. When the internal resetting signal is no longer active, the microprocessor restarts an execution program from a predefined memory address. A resetting routine designed for the specific configuration of the peripherals and registers of the microprocessor is then executed.
There are two types of resetting modes: synchronous resetting and asynchronous resetting. Synchronous resetting assumes the existence of a clock signal generated by a clock internal to the microprocessor. When the user employs external means to initiate a resetting of the microcontroller, a certain amount of time defined by a predetermined number of internal clock pulses elapses before the internal resetting signal becomes active.
In other words, synchronous resetting is effective only when the internal resetting signal is active. The internal resetting signal thus has the essential function of placing all the characteristic elements of the microcontroller into a predefined default state. These characteristic elements primarily include flip-flop circuits.
Asynchronous resetting does not require the prior existence of a clock internal to the microcontroller. As soon as the external resetting signal is activated by the user, the internal resetting signal becomes active. Accordingly, the microcontroller is immediately configured to the default state.
An advantage of synchronous resetting is that it allows the microcontroller time to terminate operations in progress, especially write operations. During a synchronous resetting, a risk of loss of essential information is thus limited. However, if a synchronous resetting is initiated just after the microcontroller is powered on, then a situation of high energy consumption exists. This may cause damage within the microprocessor because the internal clock of the microprocessor appears only at the end of a certain period of time after the microprocessor has been powered on. In other words, the resetting signal cannot synchronize with the internal clock. The same type of problem arises when the internal clock disappears accidentally during the use of the microprocessor. The system is therefore in an indeterminate state until reappearance of the internal clock.
Asynchronous resetting is an approach to the above described problem associated with synchronous resetting. That is, a problem arises when a resetting signal for a synchronous resetting mode cannot synchronize with the internal clock. However, an asynchronous resetting mode cannot be used to complete operations in progress. Therefore, loss of information is frequent. At worst case, the CPU carries out a write operation randomly in an unspecified memory. There is thus the risk of losing essential data. The choice between synchronous resetting and asynchronous resetting raises a problem.
It would be desirable to have a choice between generating a synchronous resetting signal when the clock internal to the microprocessor exists, and generating an asynchronous resetting signal when this clock no longer exists or has just failed. Hereinafter, only microprocessors shall be referred to. However, all that is described may apply to microcontrollers.
SUMMARY OF THE INVENTION
A resetting signal is delayed when an internal clock signal of the microprocessor is active, and the resetting signal is immediately applied when the internal clock signal is inactive.
An object of the invention is to provide a microprocessor comprising a primary resetting circuit. The primary resetting circuit includes a first input to receive an initial resetting signal external to the microprocessor, and a second input to receive a clock signal internal to the microprocessor. An output of the primary resetting circuit provides a resetting signal internal to the microprocessor as a function of the external resetting signal and as a function of the internal clock signal. The primary circuit further comprises an additional input for receiving a selection signal to set the primary circuit in a resetting mode, which is either synchronous or asynchronous, and to produce the internal resetting signal with an appropriate delay.
REFERENCES:
patent: 4464584 (1984-08-01), Hentzschel et al.
patent: 5323066 (1994-06-01), Feddeler et al.
patent: 41 32 397 A1 (1993-04-01), None
patent: 2 308 687 (1997-07-01), None
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Galanthay Theodore E.
Heckler Thomas M.
STMicroelectronics S.A.
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