Synchronous memory test method

Details Synchronous memory test method Synchronous memory test method

1998-07-14

1999-06-15

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Testing

365226, G11C 1300

Patent

active

059128526

ABSTRACT:
An automated, portable, and time conservative memory test system for identifying test parameters including type, control line configuration, depth, width, access time, and burst features of any one of a wide variety of synchronous memories including SDRAMs and SGRAMs, and whether an IC chip, bank, board or module, without requiring hardware modifications or additions to the memory device being identified, and without requiring storage of test patterns or characterizing data in the memory device.

REFERENCES:
patent: 5408435 (1995-04-01), McClure et al.

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