Synchronous memory devices and control methods for...

Details Synchronous memory devices and control methods for... Synchronous memory devices and control methods for...

2008-07-21

2010-10-26

Le, Vu A (Department: 2824)

Static information storage and retrieval

Read/write circuit

C365S189160

Reexamination Certificate

active

07821842

ABSTRACT:
Synchronous memory devices and control methods for performing burst write operations are disclosed. In one embodiment, a synchronous memory device for controlling a burst write operation comprises a first buffer circuit for buffering a first control signal requesting an exit from the burst write operation in synchronization with a clock signal associated with the burst write operation, and a latch circuit for performing a reset in response to the first control signal forwarded by the first buffer circuit, wherein the reset triggers the exit from the burst write operation.

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patent: 2005/0265088 (2005-12-01), Ishizaki
patent: 07254278 (1995-10-01), None
patent: 2004212749 (2004-07-01), None
patent: 2004355801 (2004-12-01), None

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