Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
2006-08-22
2006-08-22
Peikari, B. James (Department: 2189)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C710S016000, C710S011000, C710S018000, C710S019000, C710S074000, C710S035000, C711S167000
Reexamination Certificate
active
07096283
ABSTRACT:
A synchronous flash memory includes an array of non-volatile memory cells. The memory array is arranged in rows and columns, and can be further arranged in addressable blocks. Data communication connections are used for bi-directional data communication with an external device(s), such as a processor or other memory controller. The memory can output data from storage registers on the data communication connections during a series of clock cycles to provide a burst of register data. The memory can also provide the register data in accordance to a defined clock latency value. The register data can include status data, operating setting data, manufacture identification, and memory device identification.
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Leffert Jay & Polglaze P.A.
Peikari B. James
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