Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-11-07
2006-11-07
Elms, Richard (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S230080, C365S230060, C365S185130, C365S185050, C365S189020, C342S103000, C375S215000, C331S060000
Reexamination Certificate
active
07133324
ABSTRACT:
A dual data rate dynamic random access memory (DDR DRAM) device may operate in dual DDR modes via a mode selection circuit configured to enable a Dual Data Rate (DDR)1mode of operation for the DDR DRAM or a DDR2mode of operation for the DDR DRAM.
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Hwang Sang-Joon
Park Youn-Sik
Elms Richard
Myers Bigel & Sibley & Sajovec
Samsung Electronics Co,. Ltd.
Wendler Eric J.
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