Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1996-06-21
1997-05-20
Westin, Edward P.
Electronic digital logic circuitry
Multifunctional or programmable
Array
36523005, H03K 19177, G11C 1300
Patent
active
056315775
ABSTRACT:
A configurable logic block (CLB) in the dual port mode uses one address to write the same information in a first RAM and a second RAM. The input signals provided to the second function generator can be used to read, independently from and even asynchronously with, the write operation, thereby dramatically increasing the speed of applications using the two sets of RAM. A CLB in the synchronous mode latches the appropriate address and data signals, and generates a strobed write enable signal. The strobed signal is self-timed, i.e. the write operation is fully automatic, thereby ensuring that a write operation occurs within one clock cycle.
REFERENCES:
patent: 5448522 (1995-09-01), Huang
patent: 5493536 (1996-02-01), Aoki
patent: 5513139 (1996-04-01), Butler
patent: 5559450 (1996-09-01), Ngai et al.
Cheung Edmond Y.
Erickson Charles R.
Freidin Philip M.
Syu Tsung-Lu
Harms Jeanette S.
Roseen Richard
Westin Edward P.
Xilinx , Inc.
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