Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2005-03-01
2005-03-01
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S105000, C711S156000
Reexamination Certificate
active
06862667
ABSTRACT:
A memory array is divided into a plurality of blocks. A plurality of mode storage units is so disposed as to correspond to the memory blocks. When a plurality of controllers outputs a mode setting instruction at the time of making of power, a setting unit113sets control information designated by the mode setting instruction to the corresponding mode storage unit. When different controllers gain access to a synchronous DRAM, an access operation is executed for the corresponding memory block in accordance with the control information.
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Asakawa Masashi
Kousaki Yasuo
Matsui Noriyuki
Takamura Shigeru
Arent Fox
Choi Woo H.
Kim Matthew
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