Synchronous/asynchronous bridge circuit for improved...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S310000, C710S052000, C713S501000, C713S600000, C370S401000

Reexamination Certificate

active

07085874

ABSTRACT:
The bridge circuit comprises a first interface circuit operable to receive data from a data source at a first data rate; a second interface circuit operable to transmit the data to a data receiver at a second data rate; a data coupling circuit comprising: a synchronous coupling circuit operable to pass said data synchronously between the first interface circuit and the second interface circuit; and an asynchronous coupling circuit operable to pass the data asynchronously between the first interface circuit and the second interface circuit. Control logic is responsive to a synchronous transfer request signal to cause data to be passed by the synchronous coupling circuit once any data within the asynchronous coupling circuit has been emptied.

REFERENCES:
patent: 3051787 (1962-08-01), Parks
patent: 5450549 (1995-09-01), Casparian
patent: 6289065 (2001-09-01), Holt et al.
patent: 2005/0055489 (2005-03-01), Elliott
patent: 2005/0086019 (2005-04-01), Yeh et al.
patent: 2005/0228929 (2005-10-01), Penton et al.
patent: 2006/0015678 (2006-01-01), Wang et al.
“Isochronous Ethernet-an ATM bridge for multimedia networking” by Worsley et al. (abstract only) Publication Date: Jan. Mar. 1997.

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