Synchronizing signal clamping circuit of image signal processing

Details Synchronizing signal clamping circuit of image signal processing Synchronizing signal clamping circuit of image signal processing

1994-02-28

1996-03-19

Kostak, Victor R.

Television

Image signal processing circuitry specific to television

Dc insertion

348696, H04N 518

Patent

active

055006884

ABSTRACT:
A synchronizing signal clamping circuit for an integrated image signal processing circuit has an input buffer circuit for receiving a composite image signal; a level clamping circuit for clamping a synchronizing signal tip level of the composite image signal, in response to an error detecting signal; an error detecting circuit for detecting the difference between a reference voltage signal and the output synchronizing signal tip level of the composite image signal and for outputting the result as the error detecting signal, in response to a control signal; and a synchronizing signal interval distributor circuit which controls the error detecting circuit so that the error detecting circuit can detect the difference between said reference voltage signal and the synchronizing signal tip level of the composite image signal only for a period shorter than the interval of a synchronizing signal applied to a third input terminal.

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patent: 5057920 (1991-10-01), Wilkinson
patent: 5140421 (1992-08-01), Sumiyoshi
patent: 5321504 (1994-06-01), Mazet
patent: 5371552 (1994-12-01), Brummette et al.

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