Synchronized clock generating apparatus

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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Details

327146, 327154, 327155, H03L 700

Patent

active

055348050

ABSTRACT:
A synchronized clock generating apparatus includes a delayed clock generating circuit including a plurality of serially connected delaying elements for generating delayed clock signals delayed successively to an incoming basic clock signal. A plurality of storage elements store therein a predetermined level in response to transitions occurring in associated ones of the basic and delayed clock signals after an asynchronous trigger signal is applied thereto. A clock selection logic circuit is controlled by the output signal from the storage elements for detecting the clock signal transition occurring closest in time to the application of the asynchronous trigger signal, and for selecting a desired one of the clock signals based on the result of the detection, as a synchronized clock input signal.

REFERENCES:
patent: 4851710 (1989-07-01), Grivna
patent: 4973860 (1990-11-01), Ludwig
patent: 5086236 (1992-02-01), Feemster
patent: 5252867 (1993-10-01), Sorrells et al.

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