Synchronization signal detection circuit and method of...

Television – Synchronization

Reexamination Certificate

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C348S521000, C348S725000

Reexamination Certificate

active

07602444

ABSTRACT:
A synchronization signal detection circuit and method of a digital TV (DTV) receiver are provided. The synchronization signal detection circuit determines a precise main path by determining powers in consideration of the influence of multiple paths near signals located at a peak value location and guarantees a stable operation of an equalizer by using error values output from a decoder to generate a synchronization locking control signal. A power signal based on the correlation of the received signal with a PN511 sequence is filtered to compensate for a dynamic multipath distortion (e.g., due to other multipath signals near signals located at a peak value location). The magnitude of the filtered power signal is then compared (e.g., with a predetermined threshold value) to determine the position of the main path (e.g., at the peak value location, or at a pre or post multipath signal location).

REFERENCES:
patent: 6356598 (2002-03-01), Wang
patent: 6614490 (2003-09-01), Hong et al.
patent: 6803966 (2004-10-01), Hong
patent: 7480009 (2009-01-01), Cheon et al.
patent: 1998-059936 (1998-07-01), None
patent: 2001-0069142 (2001-07-01), None

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