Electrical computers and digital data processing systems: input/ – Interrupt processing – Source or destination identifier
Reexamination Certificate
2005-12-20
2005-12-20
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
Source or destination identifier
C710S048000
Reexamination Certificate
active
06978331
ABSTRACT:
A method and apparatus for conveying data over a packet-switching network (26). Data are received from a peripheral device (25) for transmission via the network to a memory (22) associated with a central processing unit (CPU) (21), followed by an interrupt signal from the peripheral device associated with the data. One or more data packets containing the data are sent over the network to a host network interface (32) serving the memory and the CPU, followed by an interrupt packet sent over the network to the host network interface. Responsive to the interrupt packet, an interrupt input of the CPU is asserted only after the one or more data packets have arrived at the host network interface.
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Crupnicoff Diego
Gabbay Freddy
Kagan Michael
Rottenberg Shimon
Auve Glenn A.
Friedman Mark M.
Mellanox Technologies Ltd.
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