Electrical computers and digital processing systems: virtual mac – Task management or control – Batch or transaction processing
Reexamination Certificate
2011-03-15
2011-03-15
Zhen, Li B (Department: 2195)
Electrical computers and digital processing systems: virtual mac
Task management or control
Batch or transaction processing
Reexamination Certificate
active
07908604
ABSTRACT:
Barrier synchronization between multiprocessors is performed at high speed while reducing overhead of parallel processing without adding any special hardware mechanism. A parallel computer synchronization method is provided to synchronize threads through barrier synchronization for parallel execution of plural threads on plural processor modules. The parallel computer has plural processor modules (P0and P1) equipped with plural processor cores (cpu0to cpu3). The processor cores are each assigned plural threads (Th0to Th7) to execute multithread processing. The plural threads (Th0to Th7) are set in hierarchical groups (Gr), and barrier synchronization is performed on each group separately.
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Aoki Hidetaka
Takayama Koichi
Brundidge & Stanger, P.C.
Hitachi , Ltd.
Kumabe Blake
Zhen Li B
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