Synchronization detection apparatus

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

Reexamination Certificate

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Details

C375S365000, C375S368000

Reexamination Certificate

active

07133481

ABSTRACT:
An input signal DT contains a segment synchronization signal compliant with the ATSC standard. A clock multiplication section111multiplies a clock CK. A switchable sampling section112selects a sample point from among a plurality of timing points that are defined by the multiplied clock, and samples the input signal DT at the selected sample point. Moreover, the switchable sampling section112switches sample points from one to another in a synchronization-unestablished state. Once the segment synchronization is established, a synchronization detection device may maintain a synchronization-established state until the field synchronization detection fails, or the synchronization detection device may output a synchronization detection signal after shifting it in the time direction based on a bit error rate RT of the input signal.

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